The present disclosure relates to a nonvolatile semiconductor memory device, and more particularly, to a nonvolatile semiconductor memory device configured to decrease the number of programming times and/or a program current capacity.
Recently, nonvolatile semiconductor memory devices, particularly flash memories, have been enabled to electrically reprogram data, and to retain data even when a power supply source is turned off. Accordingly, flash memories are widely used as memory devices for portable equipment, such as portable phones and digital cameras.
Generally, a memory cell is programmed by applying a certain voltage higher than a power source voltage to a control gate of the memory cell, and a program current higher than a certain current level is required. Furthermore, since the high voltage applied to the control gate is generated through a charge pump included in the chip, the number of memory cells that may be simultaneously programmed is limited by the ability of the charge pump and/or layout restrictions.
For example, when the number of bits that may be simultaneously programmed is four, 16-bit data are divided into 4-bit segments and programmed a total of four times. Assuming that a state in which an electric charge is not left in a floating gate is set as logic 1, when programming n bits (where n is an integer), all of the n bits must be programmed when all bits are logic 0. Also, when programming is designed to be performed m bits at a time (where m is an integer, m>n), the ability of the charge pump is suppressed, from the restriction of a chip area, and the programming operation must be performed n/m times (or a number of times of the integer closest to and greater than n/m times) to program all of the n bits.
If the number of programming times increases, additional time is incurred for programming, which increases in proportion to the number of programming times. However, if the number of bits that may be programmed at a time is not set as m bits and programming is designed to be performed simultaneously to program all n bits, the area occupied by the chip of the charge pump must be larger, thus increasing consumption current and increasing product size.
Technology for shortening the average time taken for programming data is disclosed, for example, in Japan Patent Publication No. 2006-24347. However, the circuit configurations are complicated.